2-4 September 2024
Europe/Berlin timezone

NHR@FAUThis on-site course covers performance engineering approaches on the compute node level. Even application developers who are fluent in OpenMP and MPI often lack a good grasp of how much performance could at best be achieved by their code.

This is because parallelism takes us only half the way to good performance.

Even worse, slow serial code tends to scale very well, hiding the fact that resources are wasted. This course conveys the required knowledge to develop a thorough understanding of the interactions between software and hardware. This process must start at the core, socket, and node level, where the code gets executed that does the actual computational work. We introduce the basic architectural features and bottlenecks of modern processors and compute nodes.

Pipelining, SIMD, superscalarity, caches, memory interfaces, ccNUMA, etc., are covered. A cornerstone of node-level performance analysis is the Roofline model, which is introduced in due detail and applied to various examples from computational science. We also show how simple software tools can be used to acquire knowledge about the system, run code in a reproducible way, and validate hypotheses about resource consumption. Finally, once the architectural requirements of a code are understood and correlated with performance measurements, the potential benefit of code changes can often be predicted, replacing hope-for-the-best optimizations by a scientific process.

  • Introduction
    • Basic architecture of multicore systems: pipelines, SIMD, caches, sockets, memory
    • The important role of system topology
  • Tools: topology & affinity in multicore environments
    • likwid-topology and likwid-pin, alternatives
  • Roofline model basics         
    • Model assumptions and construction
    • Simple examples
    • Limitations of the Roofline model
  • Tools: hardware performance counters
    • Why hardware performance counters?
    • likwid-perfctr
    • Validating performance models
  • Optimal use of parallel resources
    • Single Instruction Multiple Data (SIMD)
    • Cache-coherent Non-Uniform Memory Architecture (ccNUMA)
  • Roofline case studies
    • Tall & skinny dense matrix-matrix multiplication
    • Sparse matrix-vector multiplication
    • Jacobi (stencil) smoother
  • Basics of performance engineering
    • PE process
    • Code profiling
    • Proper benchmarking
    • Reproducibility and documentation
  • Beyond Roofline: The ECM performance model (optional)



You have to be able to handle a Linux command line and file editing remotely. Basic knowledge of C, C++, or Fortran programming and of OpenMP is required.


Exercises will be done on a cluster at NHR@FAU. You will use terminals in the seminar room or your own device if you wish.




Prof. Gerhard Wellein, Dr. Georg Hager, Dr. Jan Eitzinger, and Thomas Gruber (NHR@FAU, Erlangen)

Prices and Eligibility

Participation is free of charge for attendees from German universities, academic computing centers, and research institutions. Please only register for the course if you are really going to attend. No-shows will be blacklisted and excluded from future NHR@FAU events.


All actual course attendees will receive a course certificate.


Please register with your official e-mail address to prove your affiliation.

Travel and Accommodation

For getting to NHR@FAU you may look at our "How to find us" page: https://hpc.fau.de/find-us/

List of viable hotels: https://hpc.fau.de/accommodation/

Martensstr. 3 91058 Erlangen Germany
Registration for this event is currently open.
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