Feb 19 – 21, 2018
RWTH Aachen University SuperC
Europe/Berlin timezone

Deep machine learning implementation in FPGA

Feb 20, 2018, 12:35 PM
15m
RWTH Aachen University SuperC

RWTH Aachen University SuperC

RWTH Aachen University Templergraben 57, 52062 Aachen phone:0241 8090801

Speakers

Dr Michele Caselle (KIT)Mr Weijia WANG

Primary author

Mr Weijia WANG

Presentation materials