Description
3D Ultrasound Computer Tomography (3D USCT) is an imaging method for the early detection of breast cancer. It provides three-dimensional multimodal images of the breast. The 3D USCT device developed at Karlsruhe Institute of Technology contains more than two thousand ultrasound transducers placed in a water-filled semi-ellipsoidal reservoir where the patient submerges one breast. The ultrasound transducers are grouped as transducer array systems (TAS) of 18 receiver (RX) and transmitter (TX) elements. The transducer front-end electronics contains high voltage (HV) and low voltage (LV) amplifiers and switches which are implemented as an application-specific integrated circuit (ASIC). This contribution presents a patented mixed signal, multichannel, transceiver ASIC (USCT9CV2) developed in a commercial 350 nm high voltage CMOS (HV-CMOS) process. The HV-CMOS process provides low voltage and high voltage transistors that can be combined on the same substrate. The HV transistors can sustain voltages up to 120 V. The ASIC consists of nine high voltage amplifiers as TX elements and three low noise low voltage amplifiers as RX elements. The high voltage amplifier is designed as an inverting amplifier with a gain of 20. It can generate signals with an amplitude up to 120 V. The 3-stage low noise amplifier is designed for amplification of signals from 10 $\mu$V to 10 mV with variable gain from 100 to 10000. In addition, the ASIC contains a digital interface for the configuration. This digital block implements a serial protocol interface (SPI) decoder. The use of the ASIC offers the following advantages for USCT over a discrete component solution: more RX/TX channels, high bandwidth, variable gain in linear steps, low power, small size, reduced crosstalk due to shorter and isolated signal lines. The ASIC enables a more cost-effective solution of our measuring problem than a discrete design. Recent measurements with prototype transducers (Figure a) are promising and fulfill the requirements of 3D USCT. The TX excitation, a linear chirp signal (Figure c) between 200 kHz to 4.7 MHz, was generated off chip and amplified by the high voltage amplifier. The output amplitude (Figure d) is 90.4 V (peak to peak for lower frequencies) and the gain is 18.4. The amplification is relatively constant with 18\% drop in the frequency range of the chirp signal (Figure b). The RX signals of 100 $\mu$V were amplified by the LV amplifiers up to 300 mV with a gain factor of around 3000.
